By Christian Piguet
The ability intake of microprocessors is likely one of the most vital demanding situations of high-performance chips and conveyable units. In chapters drawn from Piguet's lately released Low-Power Electronics layout, this quantity addresses the layout of low-power microprocessors in deep submicron applied sciences. It offers a targeted reference for experts curious about systems-on-chips, from low-power microprocessors to DSP cores, reconfigurable processors, thoughts, ad-hoc networks, and embedded software.
Low-Power Processors and platforms on Chips is prepared into 3 large sections for handy entry. the 1st part examines the layout of electronic sign processors for embedded purposes and methods for lowering dynamic and static energy on the electric and process degrees. the second one half describes numerous facets of low-power platforms on chips, together with and embedded software program facets, effective information garage, networks-on-chips, and purposes similar to routing thoughts in instant RF sensing and actuating units. the ultimate part discusses embedded software program matters, together with information on compilers, retargetable compilers, and coverification tools.
Providing designated examinations contributed by means of best specialists, Low-Power Processors and structures on Chips offers authoritative info on easy methods to retain excessive functionality whereas reducing energy intake in sleek processors and SoCs. it's a must-read for someone designing sleek desktops or embedded structures.
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Extra resources for Low-Power Processors and Systems on Chips
Example text
46, 2/3, p. 235, 2002. [11] S. , 1999. [12] H. Holma and A. , WDCMA for UMTS: Radio Access for Third-Generation Mobile Communications, John Wiley & Sons, New York, 2001. [13] S. Thompson, I. Young, J. Greason, and M. 1-µm logic designs, VLSI Tech. Symp. , pp. 69–70, 1997. [14] M. Horiguchi, T. Sakata, and K. Itoh, Switched-source-impedance CMOS circuit for low standby subthreshold current giga-scale LSIs, IEEE JSSC, 28, pp. 1131–1135, Nov. 1993. [15] B. Sheu, D. Scharfetter, P. Ko, and M. Jeng, BSIM: berkeley short-channel IGFET model for MOS transistors, IEEE JSSC, 22, pp.
35] J. , Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage, ISSCC 2002, pp. 422–423. [36] T. Burd, T. Pering, A. Stratakos, and R. , A dynamic voltage scaled microprocessor system, IEEE J. Solid-State Circuits, 35, pp. 1571–1580, Nov. 2000. 1. It is estimated that by the year 2010, wireless phones will surpass wire line phones, each having a worldwide penetration of more than 20%. The market for digital signal processors (DSPs) has a growth rate of 40%.
1 MIPS. A half-rate coder already requires 23 MIPS. 2 introduces the driving application — in this case, wireless mobile communications. 3 identifies the most important computation-intensive functions, and gives the DSP approach for a low-power solution. 4 discusses the integration of DSP processors and coprocessors in systems on chip (SoCs). 5. 2 The Application Driver DSP processors are made to support hard real-time signal processing applications. This translates in the rule that 10% of the code is executed 90% of the time, and 90% of the code is executed 10% of the time.
